The PX1011B is a high-performance, low-power, single-lane PCI Express electrical PHYsical layer (PHY) that handles the low level PCI Express protocol and signaling. The PX1011B PCI Express PHY is ...
Silicon-proven PCIe Subsystem Offers High Performance, Low Risk Alternative to Traditional ASIC, FPGA Options Santa Clara, Calif.—ChipX, the Structured ASIC leader, today announced the CX6100 family ...
MONTEREY, Calif., Jan. 20 /PRNewswire-FirstCall/ -- At the Server I/O conference today, LSI Logic Corporation (NYSE: LSI) introduced its PCI Express Link and Physical ...
Designers now have access to silicon and volume production-proven 40-nm G PCI Express Gen1/Gen2 Physical Layer (PHY) intellectual property (IP). The SiPro PCI Express PHY product line is the first ...
PCI-Express PHY IP Compliant to PCI-Express Base Specification Revision 1.0a and PIPE (Physical Interface for PCI-Express) Specifications Santa Clara, Calif. – Monday, October 25, 2004 – Soft ...
CHESTNUT RIDGE, N.Y., Feb. 23, 2021 /PRNewswire/ -- Teledyne LeCroy introduced the CrossSync™ PHY interposers and software options, enabling the first-ever link between an oscilloscope and a protocol ...
SAN JOSE, Calif.--(BUSINESS WIRE)--PLDA, the industry leader in PCI Express® and interface IP solutions and M31, a global silicon intellectual property (IP) boutique, today announced that their ...
Pairing the PX1011A PCI Express PHY from Royal Philips Electronics with a Xilinx Spartan-3 XC3S1200E FPGA yields what is unveiled as the first low-cost, programmable PCI Express endpoint silicon ...
SHENZHEN, GUANGDONG, CHINA, March 10, 2026 /EINPresswire.com/ -- In the evolving landscape of global commerce, the ...
Artisan Components, a provider of physical intellectual property (IP), and United Microelectronics Corporation (UMC), said that the two companies are now focused on the development of a PCI-Express ...
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