EDN

ADC to FPGA high-speed connectivity using the JESD204B standard

(Information and images to follow are courtesy of Analog Devices) Designers using high-speed data converters in systems that have FPGAs as receivers have traditionally struggled with the complexity of ...
EDN

Xilinx FPGA-based deserializer for TI’s ADS6000 ADC family

Xilinx has announced immediate availability of a Virtex-4 FPGA-based deserializer reference design, application note, and evaluation module jointly developed with Texas Instruments. The new reference ...
Design-Reuse

Lattice Announces Low-Cost FPGA Based ADC Interface Reference Design Solution

LatticeECP2/M FPGA Interface to Texas Instruments’ADS6000 ADC Family Delivers Exceptional Performance and Value HILLSBORO, OR - JANUARY 14, 2008 - Lattice Semiconductor Corporation (NASDAQ: LSCC) ...
Military

Rugged EW Wideband DRFM, ADC/DAC Transceiver and FPGA Processing Solutions Displayed by Curtiss-Wright at AOC 2015

AOC International Symposium (Booth #134), Washington, D.C. – December 1-3, 2015 – Curtiss-Wright Corporation today announced that its Defense Solutions division will display its latest industry ...
Electronics Weekly

7GHz ADC-DAC card honed for FPGA software-defined radio

Abaco Systems latest analogue front-end mezzanine card for FPGAs has been tailored for software defined radio, as well as electronic warfare, radar, test and measurement. FMC300, as it will be known, ...
Electronics Weekly

ADC-FPGA-DAC board processes 12bits at 5.4Gsample/s

Teledyne e2v and Logic-X have developed an FPGA mezzanine card incorporating GHz ADCs and DACs from Telydyne. The 12bit EV12DS460A DAC provides an analogue bandwidth extending beyond 7GHz ...
Embedded

Leveraging FPGA and CPLD digital logic to implement analog to digital converters

Designers of digital systems are familiar with implementing the 'leftovers' of their digital design by using FPGAs and CPLDs to glue together various processors, memories, and standard function ...
Military

Model 371 (Dual 16-bit / 250 Msps ADC With FPGA Based DSP Accelerator)

A Xilinx Kintex-7 FPGA couples two ADC channels to QDR II+ SRAM and a Gen2 PCIe bus interface. Available in PCIe, XMC, and CCXMC formats all starting at $3,890. By ...
Design-Reuse

Xilinx Announces FPGA-Based Deserializer Solution for TI's ADS60000 ADC Family

SAN JOSE, Calif., April 16, 2007 – Xilinx, Inc. (NASDAQ:XLNX), today announced immediate availability of a Virtex™-4 FPGA-based deserializer reference design, application note and evaluation ...